Locality: Milan Area, Italy
Summary: Synthesis of complex IC , static timing analysis, DFT planning and implementation, RTL design and Verification, FPGA design. Team coordination and training. Technical customer interface. Tools used : SYNOPSYS Design Compiler, Tetramax, Primetime, Formality, CADENCE Ncsim, Synplicity, Spyglass, Modelsim.
Current: IC design manager at Azcom Technology
Past: IC design specialist at Misarc srl IC digital designer at STMicroelectronics
Education: Politecnico di Milano (1983-1989)
Skills: IC design
Experience: Azcom Technology (Privately Held; 51-200 employees; Building Materials industry): IC design manager, (November 2008-Present) Digital design flow for advanced technologies, DFT, design for low power, synthesis, pattern generation and validation, static timing analysis and constraints. Team coordination and training.
Misarc srl (Privately Held; 11-50 employees; Interna...
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Synthesis of complex IC , static timing analysis, DFT planning and implementation, RTL design and Verification, FPGA design. Team coordination and training. Technical customer ...
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